Seven Problems, One Systematic Approach

Super junction MOSFET problems account for a large share of power supply and motor drive field failures, and they share a common feature: the symptoms appear at the system level while the cause lives in the gate or the layout. The super junction structure that gives the CRJQ80N65G4FQ its low on-resistance also gives it a high dv/dt and a non-linear output capacitance, and those characteristics interact badly with careless layout. This article presents seven common problems in CRJQ80N65G4FQ and CRJSH38N65G4FQ circuits, with a diagnosis procedure that finds the root cause quickly.

Problem One: Gate Waveform Ringing

Ringing at tens to hundreds of megahertz is parasitic oscillation between the gate capacitance and the inductance of the gate loop. The first fix is geometric: shorten the loop from driver to gate resistor to gate and back to source. Next, increase the gate resistance in small steps until the ringing amplitude falls below roughly twenty percent of the drive voltage. Finally, add a ferrite bead close to the package to damp high-frequency oscillation without slowing the main transition.

Problem Two: False Turn-On of the Low Side

In a half bridge the fast dv/dt of the high-side switch couples through the Miller capacitance of the low-side device and can lift its gate above threshold, causing cross-conduction. Super junction devices switch faster than planar ones, so this problem is more common. Use a negative gate rail of minus three to minus five volts, a lower-impedance pull-down, or a lower off-transition gate resistance, and measure the low-side gate during a high-side transition. If the spike crosses threshold, add the negative rail.

Problem Three: EMI Peaks at the Switching Frequency

Excess electromagnetic interference at the switching frequency and its harmonics usually traces back to switching speed or layout. Slow the turn-on slightly, tighten the fast di/dt loop, and review the snubber. The CRJSH38N65G4FQ carries more current than the CRJQ80N65G4FQ and therefore develops a larger loop, so its layout deserves extra care. A layout review often removes the peak entirely.

Problem Four: Output Overshoot at Turn-Off

Drain-source overshoot at turn-off is set by loop inductance and di/dt. Super junction MOSFETs switch fast, so a loop that was acceptable for a slower device may now exceed the breakdown margin. Measure the drain voltage at the device terminals, not at the bus. If overshoot is excessive, reduce the loop area first, then increase the turn-off gate resistance, and only then consider a clamp or snubber.

Problem Five: Hot Device at Light Load

A device that runs hot at light load is often oscillating or partially turned on rather than conduction-limited. Measure the gate waveform first; if it shows oscillation or noise-induced partial conduction, losses rise sharply even with little load current. Then check switching loss at the drain with a current probe, and finally verify the mounting thermal resistance. Gate problems often masquerade as thermal problems.

Problem Six: Light-Load Instability

Some supplies become unstable only at light load, when the switching frequency rises into a range where the super junction output capacitance forms a resonance with the transformer or the snubber. Adjust the control loop, add a small RC snubber across the device, or change the valley-skipping threshold. Confirm the fix across the full load range, not only at the point where the instability first appeared.

Problem Seven: Repeat Field Failures

If units fail repeatedly in the field while the bench is clean, suspect the layout and the environment rather than the device. Long gate loops, shared power and signal returns, and large hot loops cause most repeat failures. Add margin for the dv/dt and the temperature the field actually presents, and validate with a soak test at the worst-case conditions.

Systematic Diagnosis

Work from the waveform outward. Capture the gate voltage, the drain voltage and the drain current at the same time on a wide-bandwidth oscilloscope. Identify whether the fault appears at turn-on, turn-off, or in the steady state. Then isolate the loop, measure its inductance, and correlate the measured overshoot with the layout geometry. Change one variable at a time, and change the geometry before changing the device, because device substitution rarely fixes a layout problem.

Measurement and Instrumentation

The quality of the diagnosis depends entirely on the quality of the measurement. Use a wide-bandwidth differential probe for the gate and the drain, and a high-frequency current probe or a current shunt with a coaxial connection for the drain current. Ground the probe at the point you are measuring, because a long ground lead adds inductance and turns a clean waveform into a ringing one that does not exist. Capture single-shot events with a fast trigger rather than relying on a recurring waveform, since the worst overshoot often appears only on the first switching cycle after a load step. Log the waveform at startup, at full load and at the thermal limit, and compare the three before you change any component.

Summary

Super junction MOSFET oscillation and interference are layout and gate-drive problems first, and device problems second. Diagnose with synchronized measurements, fix the geometry, tune the gate, and validate at the temperature and load extremes. The CRJQ80N65G4FQ and CRJSH38N65G4FQ will then run quietly in even the most demanding supply.